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US 2013/0297974 A1Published application
Processor Device with Reset Condition Trace Capabilities
AssigneeMicrochip Technology Incorporated
InventorsJustin Milks, Thomas Edward Perme, Sundar Balasubramanian, Kushala Javagal
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Abstract
A processor device with debug capabilities has a central processing unit, debug circuitry including a trace module, a system clock module for providing internal clock signals, and a reset detection unit which during a debug mode prevents the system clock module from receiving a reset signal.
Claims20
A processor device having debug capabilities, comprising:
- a central processing unit;
- debug circuitry including a trace module;
- a system clock module for providing internal clock signals;
- a reset detection unit which during a debug mode prevents the system clock module from receiving a reset signal.
1 more element
A method for debugging executed code within a processor device, comprising:
- executing code by a central processing unit (CPU);
- upon determining of a reset, forwarding reset signals to internal units of the microcontroller with the exception of a system clock module to allow further operation of a trace module;
- record trace information after reception of said reset.
Dependencies are inferred from the claim text.