Test of an embedded analog-to-digital converter
AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorHerve NAUDET
Life of this patent
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Abstract
A method for testing an analog-to-digital converter (ADC) includes applying ramps to the input of the converter, and classifying the digital codes produced by the converter according to a histogram. The converter is declared operational as soon as all the classes of the histogram have reached a minimum count. The minimum count may be equal to 1 in practice. The converter is declared defective if any class does not reach the minimum count before expiry of a time interval.
Claims38
1-10. (canceled)
A method for testing an analog-to-digital converter (ADC) comprising:
- applying a plurality of ramps to an input of the ADC;
- classifying digital codes produced by the ADC in response to the plurality of ramps, according to a histogram having a plurality of classes;
- and
- declaring the ADC operational as soon as all of the plurality of classes of the histogram have reached a minimum count.
A method for testing an analog-to-digital converter (ADC) comprising:
- applying at least one ramp to an input of the ADC;
- classifying digital codes produced by the ADC based upon the at least one ramp, according to a histogram having a plurality of classes;
- and
- declaring the ADC operational based upon the plurality of classes of the histogram reaching a threshold.
A device for testing an analog-to-digital converter (ADC) comprising:
- a ramp generator configured to generate a plurality of ramps input to the ADC;
- and
- a test unit configured to
- classify digital codes produced by the ADC in response to the plurality of ramps, according to a histogram having a plurality of classes and store the histogram, and
- activate a pass signal as soon as all of the plurality of classes of the histogram have reached a minimum count.
An electronic device comprising:
- an analog-to-digital converter (ADC);
- a ramp generator configured to generate at least one ramp input to said ADC;
- and
- a test unit configured to
- classify digital codes produced by the ADC based upon the at least one ramp, according to a histogram having a plurality of classes, and
- activate a pass signal based upon the plurality of classes of the histogram having reached a threshold.
An integrated circuit comprising:
- an analog-to-digital converter;
- and
- a built-in self-test unit configured to
- apply a ramp to an input of said analog-to-digital converter,
- watch codes produced by said analog-to-digital converter, and
- activate a pass signal when all the codes of said analog-to-digital converter have been produced;
- said built-in self-test unit comprising a pulse-width modulator configured to produce the ramp.
Dependencies are inferred from the claim text.