Carbon nanotube field emission device with overhanging gate

A semiconductor process applied to a wafer, the wafer comprising a silicon substrate;

• a first insulator layer on the silicon substrate;
• a first silicon layer on the first insulator layer;
• a second insulator layer on the first silicon layer;
• and a second silicon layer on the second insulator layer;
• the semiconductor process comprising:
• etching through the second silicon layer, through the second insulator layer, and through the first silicon layer to the first insulator layer to define a hole;
• lateral etching in the first silicon layer to laterally enlarge the hole at the first silicon layer;
• etching through the first insulator layer to the substrate, so that the hole has a bottom that includes the substrate;
• depositing a removable material on the wafer;
• forming an array of carbon nanotubes at the bottom of the hole on the substrate;
• and
• removing the removable material from the wafer after forming the array of carbon nanotubes.