Method to reduce read error rate for semiconductor resistive memory

Abstract

During Magnetic Random Access Memory (MRAM) write operation with opposite electrical current direction through the Magnetic tunnel junction (MTJ), two different resistance of the MTJ can be stored at the MRAM cell as logic data “1” (data_1) and logic data “0” (data_0). The data_1 and data_0 can be read out by sensing the difference in resistance of the MTJ. However, due to the process uniformity, the distribution of resistance value for data_1 (R1) and the distribution of resistance value for data_0 (R0) can be overlapped. Those cells with the distribution of resistance value located in the overlapped region will produce a read error. An additional read and/or write cycle is added to the normal read or write operation to reduce read error rate. Multiple electrical reference current for read operation is added in order to widen the process window and manufacturing margin.

Dependencies are inferred from the claim text.