Clock signal generator

A chip, comprising a crystal oscillator generating a reference signal, and further comprising a clock signal generator, wherein

• the crystal oscillator is connected to an input end of a source clock signal generator of the clock signal generator, and is configured to provide a reference signal for the source clock signal generator;
• the clock signal generator, applied to a physical layer subsystem supporting data transmission at multiple baud rates, comprises:
• a source clock signal generator, and two or more processors connected to an output end of the source clock signal generator, wherein
• the source clock signal generator outputs multiple source clock signals with the same frequency according to a reference signal of a reference clock in the subsystem;
• and
• the processors perform frequency dividing processing on the multiple source clock signals through a digital logic circuit according to an oversampling technology, to obtain a synchronous clock signal corresponding to a baud rate of data transmission in the subsystem, so as to implement timing and transceiving functions when data is transmitted at the baud rate.