Ic output signal path with switch, bus holder, and buffer

An integrated circuit comprising:

• A. functional logic having a functional output lead and a control output lead;
• B. a three state output buffer having an input, an output lead, and a control input;
• C. a serial in data lead;
• D. a first multiplexer having an output, a first input coupled to the functional output lead, and a second input coupled to the serial in data lead;
• E. a first memory circuit having an input coupled to the output of the first multiplexer and having an output coupled to the input of the three sate output buffer;
• F. a second multiplexer having an output, a first input coupled to the control output lead, and a second input coupled to the output of the first memory circuit;
• G. a second memory circuit having an output and an input coupled to the output of the second multiplexer;
• H. a serial out data lead coupled to the output of the second memory circuit;
• and
• I. a latching control buffer having an input coupled to the output of the second memory circuit, a control input, and an output coupled to the control input of the three state output buffer.