Structure of backside copper metallization for semiconductor devices and a fabrication method thereof

A fabrication method of an improved structure of backside copper metallization for semiconductor devices comprising the following steps:

• forming an active layer on the front side of a substrate, wherein said active layer comprises at least one integrated circuit;
• fabricating requested number of via holes on the backside of said substrate by using photolithography and etching technologies;
• depositing a backside metal seed layer on the backside of said substrate to cover the backside of said substrate and the interior surface of said via holes, wherein said backside metal seed layer is made of Pd;
• depositing at least one thermal expansion buffer layer to cover said backside metal seed layer;
• and
• depositing a backside metal layer to cover said thermal expansion buffer layer, and the material for said backside metal layer is Cu,
• wherein the range of the thermal expansion coefficient of said thermal expansion buffer layer is between the thermal expansion coefficients of said backside metal seed layer and of said backside metal layer.