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US 2013/0277801 A1Published application
Chip package
AssigneeMediatek Inc.
InventorsNan-Cheng CHEN, Tung-Hsien HSIEH
Life of this patent
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Abstract
According to an embodiment of the invention, a chip package is provided. The chip package includes: a lower chip package; an upper chip package disposed on an upper surface of the lower chip package; at least one conducting element disposed between the lower chip package and the upper chip package; and at least one decoupling capacitor disposed on the upper surface of the lower chip package, wherein the decoupling capacitor is not covered by the upper chip package, and the decoupling capacitor is electrically connected to a power line or a ground line in the lower chip package.
Claims20
A chip package, comprising:
- a lower chip package;
- an upper chip package disposed on an upper surface of the lower chip package;
- at least one conducting element disposed between the lower chip package and the upper chip package;
- and
- at least one decoupling capacitor disposed on the upper surface of the lower chip package, wherein the decoupling capacitor is not covered by the upper chip package, and the decoupling capacitor is electrically connected to a power line or a ground line in the lower chip package.
2 more elements
Dependencies are inferred from the claim text.