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US 2013/0277680 A1Published application
High Speed Gallium Nitride Transistor Devices
AssigneeFreescale Semiconductor, Inc.
InventorsBruce M. Green, Karen E. Moore, Olin Hartin
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Abstract
A low leakage current switch device (110) is provided which includes a GaN-on-Si substrate (11-13) covered by a passivation surface layer (43) in which a T-gate electrode with sidewall extensions (48) is formed and coated with a conformal passivation layer (49) so that the T-gate electrode sidewall extensions are spaced apart from the underlying passivation surface layer (43) by the conformal passivation layer (49).
Claims20
A method of forming gallium nitride transistor, comprising:
- providing a substrate with a gallium nitride layer covered by a passivation surface layer;
- forming a mask overlying the passivation surface layer with a first mask opening;
- etching the mask to expose a gate contact surface of the substrate under the first mask opening;
- forming a conductive gate electrode comprising a contact base portion in contact with the gate contact surface of the substrate and gate electrode sidewall extensions that are vertically spaced above the passivation surface layer by a vertical gap;
- and
- forming one or more passivation layers on the gate electrode to cover exposed sidewall surfaces of the gate electrode, wherein a portion of the one or more passivation layers is formed on a vertical sidewall of the contact base portion located below the gate electrode sidewall extensions.
3 more elements
A method for forming a gallium nitride field effect transistor device, comprising:
- providing a semiconductor comprising a gallium nitride surface layer;
- forming a mesa in the semiconductor, wherein the mesa is defined by an upper portion of the semiconductor that is thicker than a lower portion of the semiconductor and that is covered by the gallium nitride surface layer;
- covering the mesa with a passivation surface layer;
- providing a first gate mask overlying the passivation surface layer with a first mask opening located above the mesa and having a first width;
- etching through a portion of the passivation surface layer exposed by the first mask opening to expose a first portion the gallium nitride surface layer, thereby defining passivation surface layer sidewalls and forming a first gate electrode opening over the gallium nitride surface layer;
- forming a conductive gate electrode in contact with at least part of the exposed first portion of the gallium nitride surface layer, where the conductive gate electrode comprises a gate length contact base having a gate length and gate electrode sidewall extensions formed to be vertically spaced apart from the passivation surface layer by a minimum vertical gap distance YGATE;
- and
- forming one or more passivation layers on the conductive gate electrode to cover exposed sidewall surfaces of the conductive gate electrode.
5 more elements
A semiconductor device, comprising:
- a substrate comprising one or more active areas with a gallium nitride layer;
- a passivation surface layer covering the gallium nitride layer with a gate electrode opening defined by passivation surface layer sidewalls separated by a first width;
- a conductive gate electrode located at least in part in the gate electrode opening to be in contact with the gallium nitride layer, where the conductive gate electrode comprises a lower contact base having vertical sidewalk and upper gate electrode sidewall extensions formed to be vertically spaced apart from the passivation surface layer by a minimum vertical gap distance;
- and
- one or more passivation layers located on at least a portion of the vertical sidewalls of the contact base.
2 more elements
Dependencies are inferred from the claim text.