Data recovery circuit and operation method thereof

An operation method of a data recovery circuit, the operation method comprising:

• sampling data using a plurality of sampling clock signals having different phases relative to one another and outputting a plurality of sampled data;
• performing an XOR operation on the plurality of sampled data and generating a plurality of intermediate recovery data according to a result of the XOR operation;
• and
• checking the plurality of intermediate recovery data for an error and outputting intermediate recovery data that is error-free among the plurality of intermediate recovery data as recovery data.

A data recovery circuit comprising:

• a sampling circuit that samples input data with a plurality of sampling clock signals, the sampling clock signals having different phases relative to each other, the sampling circuit outputting a plurality of sampled data;
• a recovery data generation circuit that receives the plurality of sampled data and that generates first and second intermediate recovery data, the first and second intermediate recovery data having the same logic level when the plurality of sampled data all have the same logic levels, and the first and second intermediate recovery data having different logic levels when the plurality of sampled data do not all have the same logic levels;
• and
• a recovery circuit that generates recovery data that is error-free in response to the first and second intermediate recovery data.