Integrated circuit device having programmable input capacitance

A memory device, comprising:

• a first pin having a first load that is substantially fixed;
• and
• a second pin having a second load that is programmably adjustable.

An integrated circuit device comprising:

• a circuit to generate a value that specifies an adjustment to an input capacitance associated with a pin of a memory device;
• and
• an interface to provide a control signal to the pin of the memory device.

A memory controller, comprising:

• an interface to program a register on a memory device, wherein the register stores a value representative of an input capacitance value of a pin on the memory device.

A method of operation of an integrated circuit device that controls the operation of a memory device, the method comprising:

• determining a rank configuration associated with the memory device;
• based at least in part on the rank configuration, programming a load for a pin of the memory device.

An method of operation of a memory device, the method comprising:

• receiving a value representative of an adjustment to an input capacitance value of a pin;
• and
• storing the value in a register.