Mask pattern alignment method and system

An exposure system, comprising:

• an illumination unit 302 for providing a light source;
• a mask stage configured to hold at least one mask containing a mask pattern;
• a mask stage drive configured to align the mask stage;
• a wafer stage configured to hold at least one wafer;
• a wafer stage drive configured to align the wafer stage;
• an optical projection unit disposed between the mask stage and the wafer stage to expose the mask pattern on the wafer;
• and
• a controller configured to:
• divide the wafer into a plurality of regions including a first region and a second region different from the first region, each region containing a plurality chip areas;
• obtain alignment offset values for the first region;
• determine a first alignment compensation equation for the first region based on the alignment offset values for the first region;
• obtain alignment offset values for the second region;
• determine a second alignment compensation equation for the second region based on the alignment offset values for the second region;
• determine whether a chip area to be exposed is in the first region or the second region;
• when the chip area is in the first region, use the first alignment compensation equation to control at least one of the wafer stage drive and the mask stage drive to adjust alignment of the wafer with the mask;
• and
• when the chip area is in the second region, using the second alignment compensation equation to control at least one of the wafer stage drive and the mask stage drive to adjust the alignment of the wafer with the mask.