Interconnect structure having smaller transition layer via

An integrated circuit comprising:

• a first interconnect structure comprising
• a first bottom layer over a substrate, wherein the first bottom layer comprises at least one first bottom layer line and at least one first bottom layer via,
• a first transition layer over the first bottom layer, wherein the first transition layer comprises at least one first transition layer line and at least one first transition layer via, and
• a first top layer over the transition layer, wherein the first top layer comprises at least one first top layer line and at least one first top layer via,
• wherein the at least one first transition layer via has a cross sectional area at least 30% less than a cross sectional area of the at least one first top layer via;
• and
• a second interconnect structure comprising
• a second bottom layer over the substrate, wherein the second bottom layer comprises at least one second bottom layer line and at least one second bottom layer via,
• a second transition layer over the second bottom layer, wherein the second transition layer comprises at least one second transition layer line and at least one second transition layer via, and
• a second top layer over the transition layer, wherein the second top layer comprises at least one second top layer line and at least one second top layer via,
• wherein the at least one second transition layer via has a cross sectional area at least 30% less than a cross sectional area of the at least one second top layer via,
• wherein a width of the at least one first transition layer line is less than a width of the at least one second transition layer line.