Efficient lock hand-off in a symmetric multiprocessing system

An apparatus, comprising:

• a plurality of processors in a multiprocessor system;
• a first lock accessible by each processor of the plurality of processors;
• a computer-readable storage medium;
• and
• logic, stored on the computer-readable storage medium, and executed on the plurality of processors, for:
• acquiring, by a first thread running on a first processor of a plurality of processors, the first lock corresponding to a resource;
• spinning, by a second thread running on a second processor of the plurality of processors, at a low hardware-thread priority on the first lock such that the second processor does not yield processor cycles to a hypervisor;
• spinning, by a third thread running on a third processor of the plurality of processors, on a second lock in a memory local to the third processor such that the third processor is configured to yield processor cycles to the hypervisor;
• acquiring the first lock and the corresponding resource by the second thread;
• and
• in response to the acquiring of the first lock by the second thread, spinning, by the third thread, at the low hardware-thread priority on the first lock rather than the second lock such that the third processor does not yield processor cycles to the hypervisor.

A computer programming product, comprising:

• a computer-readable storage medium;
• and
• logic, stored on the computer-readable storage medium, and executed on a plurality of processors of a multiprocessor system, for:
• acquiring, by a first thread running on a first processor of a plurality of processors, a first lock corresponding to a resource, wherein the first lock is global with respect to the plurality of processors;
• spinning, by a second thread running on a second processor of the plurality of processors, at a low hardware-thread priority on the first lock such that the second processor does not yield processor cycles to a hypervisor;
• spinning, by a third thread running on a third processor of the plurality of processors, on a second lock in a memory local to the third processor such that the third processor is configured to yield processor cycles to the hypervisor;
• acquiring the first lock and the corresponding resource by the second thread;
• and
• in response to the acquiring of the first lock by the second thread, spinning, by the third thread, at the low hardware-thread priority on the first lock rather than the second lock such that the third processor does not yield processor cycles to the hypervisor.