Semiconductor memory system including reed-solomon low density parity check decoder and read method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsNAMSHIK KIM, SEONG IN HWANG, HANHO LEE
Life of this patent
Estimating the term…
Abstract
A semiconductor memory system may include a read data manager configured to store data read from a memory device, a likelihood value mapper configured to map likelihood values to the data output from the data manager and output mapping data, and a decoder configured to perform low density parity check decoding on the mapping data by using a parity check matrix. The parity check matrix may be a k*N×M matrix including k*N×M submatrices, where k, N and M are independently an integer equal to or greater than 2.
Claims20
A semiconductor memory system comprising:
- a read data manager configured to store data read from a memory device;
- a likelihood value mapper configured to map likelihood values to the data output from the data manager and to output mapping data;
- and
- a decoder configured to perform low density parity check decoding on the mapping data by using a parity check matrix,
- wherein the parity check matrix is a (k*N)×M matrix including k N×M submatrices, where k, N are M are independently an integer equal to or greater than 2,
- wherein the k N×M submatrices includes:
- a first submatrix of an N×M size;
- and
- a second submatrix of an N×M size disposed adjacent to the first submatrix and having a same element arrangement as a matrix obtained by cyclically shifting the first submatrix by N in a row direction according to a circulation cycle M, and
- wherein the first submatrix includes:
- a first row that is a binary permutation obtained by converting a code word generated according to a Reed-Solomon code into a symbol position vector;
- a second row disposed adjacent to the first row and having a same element arrangement as a row obtained by cyclically shifting the first row by 1 according to a circulation cycle N;
- and
- a third row disposed adjacent to the second row, having a same element arrangement as a row obtained by cyclically shifting the second row by 1 according to a circulation cycle N, and differing from the first row.
A data read method of a semiconductor memory system, comprising:
- reading data stored in the semiconductor memory system by using first read voltages;
- performing low density parity check decoding on the read data by using a parity check matrix;
- and
- outputting a result of correcting an error of the read data according to a result of the low density parity check decoding,
- wherein the parity check matrix is a (k*N)×M matrix including k N×M submatrices, where k, N and M are independently an integer equal to or greater than 2,
- wherein the k N×M submatrices includes:
- a first submatrix of an N×M size;
- and
- a second submatrix of an N×M size disposed adjacent to the first submatrix and having a same element arrangement as a matrix obtained by cyclically shifting the first submatrix by N in a row direction according to a circulation cycle M, and
- wherein the first submatrix includes:
- a first row that is a binary permutation obtained by converting a code word generated according to a Reed-Solomon code into a symbol position vector;
- a second row disposed adjacent to the first row and having a same element arrangement as a row obtained by cyclically shifting the first row by 1 according to a circulation cycle N;
- and
- a third row disposed adjacent to the second row, having a same element arrangement as a row obtained by cyclically shifting the second row by 1 according to a circulation cycle N, and differing from the first row.
A data read method of a semiconductor memory system, comprising:
- reading data stored in the semiconductor memory system by using a normal read voltage;
- restoring a parity check matrix for correcting an error of the read data;
- performing low density parity check decoding on the read data by using the restored parity check matrix;
- and
- outputting a result of correcting an error of the read data according to a result of the low density parity check decoding,
- wherein restoring the parity check matrix comprises:
- reading at least one stored row of a low density parity check matrix;
- and
- restoring the low density parity check matrix such that the other rows of the low density parity check matrix each have an element arrangement in which the at least one read row is cyclically shifted by 1 or more in a row direction,
- wherein the at least one row is a binary permutation obtained by converting a code word generated according to a Reed-Solomon code into a symbol position vector.
Dependencies are inferred from the claim text.