Memory management method and information processing device
AssigneeKabushiki Kaisha Toshiba
InventorAkira Takeda
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a memory management method implemented by a computer includes managing each block of a memory region included in the computer based on a buddy allocation algorithm. The method includes managing a correspondence relation between a virtual address and a physical address of one block using one entry of a page table. Each block has a size of a super page. The method includes allocating an empty first block to a process so that the number of empty blocks does not exceed the number of empty entries of a translation look-aside buffer (TLB).
Claims20
A memory management method implemented by a computer, the method comprising:
- managing each block of a memory region included in the computer based on a buddy allocation algorithm;
- and
- managing a correspondence relation between a virtual address and a physical address of one block using one entry of a page table, each block having a size of a super page,
- wherein allocating an empty first block to a process so that the number of empty blocks does not exceed the number of empty entries of a translation look-aside buffer (TLB).
An information processing device, comprising:
- a processor core that executes a process;
- a memory that includes a memory region, and stores a page table describing a correspondence relation between a virtual address and a physical address of the memory region allocated to the process;
- and
- a memory management unit that includes a TLB caching an entry related to the memory region allocated to the process in the page table, and processes access to the memory region by the processor core using the TLB, wherein
- the processor core
- manages the memory by unit of block based on a buddy allocation algorithm, each block having a size of a super page,
- manages one entry of the page table for one block, and
- allocates an empty first block to the process so that the number of empty blocks does not exceed the number of empty entries of the TLB.
Dependencies are inferred from the claim text.