Clock conversion apparatus, frame processing apparatus and frequency control method

Abstract

A clock conversion apparatus comprising, an elastic store memory in which data are written in synchronization with a first clock and from which data are read out in synchronization with a second clock, a phase comparator for detecting phase difference between a third clock obtained by imparting a first variable phase shift to a divided clock of the first clock and a fourth clock obtained by imparting a second variable phase shift to a divided clock of the second clock, and an oscillator for generating a clock having frequency in accordance with the phase difference as the second clock.

Dependencies are inferred from the claim text.