Self-aligned patterning with implantation
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorTzu-Yen Hsieh
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorTzu-Yen Hsieh
Estimating the term…
A method of fabricating a plurality of features of a semiconductor device includes providing a dielectric layer over a silicon layer, and etching the dielectric layer and the silicon layer to form a plurality of first apertures in the dielectric layer and the silicon layer, wherein adjacent apertures of the plurality of first apertures are set apart by a first pitch. The method further includes etching a plurality of second apertures in the dielectric layer, each aperture of the plurality of second apertures having a greater width than and centered about a respective aperture of the plurality of first apertures, implanting a plurality of dopants into the silicon layer aligned through the plurality of second apertures in the dielectric layer, wherein doped portions of the silicon layer are set apart by a second pitch less than the first pitch, and removing undoped portions of the silicon layer.
A method of fabricating a plurality of features, the method comprising:
A method of fabricating a plurality of features, the method comprising:
A method of fabricating a plurality of features, the method comprising:
Dependencies are inferred from the claim text.