Performing statistical timing analysis with non-separable statistical and deterministic variations

A computer readable storage medium containing an executable program for performing timing analysis of an integrated circuit chip, where the program performs steps of:

• computing a timing quantity of the integrated circuit chip, wherein the timing quantity depends on at least a first process parameter that is deterministic and corner-based and a second process parameter that is non-separable with the first process parameter;
• and
• performing a single timing run using the timing quantity, wherein the single timing run produces an arrival time, a required arrival time, or a timing slack at a node of the integrated circuit chip.

Apparatus for performing timing analysis of an integrated circuit chip, the apparatus comprising:

• means for computing a timing quantity of the integrated circuit chip, wherein the timing quantity depends on at least a first process parameter that is deterministic and corner-based and a second process parameter that is non-separable with the first process parameter;
• and
• means for performing a single timing run using the timing quantity, wherein the single timing run produces an arrival time, a required arrival time, or a timing slack at a node of the integrated circuit chip.