Dynamic error handling using parity and redundant rows
AssigneeIntel Corporation
InventorsAltug Koker, Shailesh Shah, Aditya Navale, Murali Ramadoss, Satish K. Damaraju
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AssigneeIntel Corporation
InventorsAltug Koker, Shailesh Shah, Aditya Navale, Murali Ramadoss, Satish K. Damaraju
Estimating the term…
Embodiments of an invention for dynamic error correction using parity and redundant rows are disclosed. In one embodiment, an apparatus includes a storage structure, parity logic, an error storage space, and an error event generator. The storage structure is to store a plurality of data values. The parity logic is to detect a parity error in a data value stored in the storage structure. The error storage space is to store an indication of a detection of the parity error. The error event generator is to generate an event in response to the indication of the parity error being stored in the error storage space.
An apparatus comprising:
A method comprising:
A system comprising:
Dependencies are inferred from the claim text.