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US 2013/0159781 A1Published application
System For Compression Of Fixed Width Values In A Processor Hardware Trace
AssigneeMIPS Technologies, Inc.
InventorJames Hippisley Robinson
Life of this patent
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Abstract
A method of tracing processor instructions includes forming a compressed trace stream with a dynamic unit width indicator and a value block. The dynamic unit width indicator includes an address/data width indicator qualified by a unit indicator. The unit value block has a width that is a function of the address/data width indicator and the unit indicator.
Claims23
A method of tracing processor instructions, comprising:
- invoking a trace stream mode;
- and
- forming a compressed trace stream with a dynamic unit width indicator and a value block.
A computer readable storage medium storing executable instructions to characterize a circuit, comprising executable instructions to:
- receive a fixed unit width trace stream;
- and
- form a compressed trace stream with a dynamic unit width indicator and a unit value block.
A processor, comprising:
- circuitry to generate a compressed trace stream with a dynamic unit width indicator and a value block;
- and
- a port to route the compressed trace stream.
A system, comprising:
- a processor to form a compressed trace stream with a dynamic unit width indicator and a value block;
- and
- a probe to receive the compressed trace stream.
A probe, comprising:
- a memory;
- and
- an instruction trace control block to transform a fixed unit width trace stream to a compressed trace stream with a dynamic unit width indicator and value block.
Dependencies are inferred from the claim text.