Fpga apparatus and method for protecting bitstream

An FPGA (field programmable gate array) apparatus for protecting bitstreams, comprising:

• a random number generator configured to be disposed in the FPGA apparatus and generate an encryption/decryption key and an initial value for encryption/decryption of a bitstreams;
• a key storage unit configured to be accessed only from within the FPGA apparatus, and store the encryption/decryption key and the initial key;
• a setting bitstream storage unit configured to store bitstreams for setting authentication and encryption/decryption, the setting bitstream storage being an internal non-volatile memory;
• and
• an authentication and encryption/decryption setting unit configured to call the encryption and decryption key and the initial value stored in the key storage unit to store encrypted bitstreams and authentication codes generated as a result of performing encryption on the bitstreams stored in the setting bitstream storage unit in an external non-volatile memory and verity integrity of the encrypted bitstreams stored in the external non-volatile memory at a time of designing of the FPGA apparatus using the encrypted bitstreams.