Providing capacity guarantees for hardware transactional memory systems using fences

A method, comprising:

• compiling a portion of source code, comprising:
• determining a speculative region associated with the portion of source code;
• generating a plurality of machine-level instructions based at least on the portion of source code;
• and
• inserting at least one fencing instruction into the plurality of machine-level instructions in response to determining the speculative region.

A processing device that comprises:

• at least one cache memory;
• at least one processing unit, communicatively coupled to the at least one cache memory, being adapted to execute one or more processing device instructions in an instruction stream;
• and
• an out-of-order speculation supervisor unit adapted to determine an availability of at least one hardware resource associated with the processing device, and adapted to generate an indication to insert a fencing instruction in response to the determined availability.

A non-transitory, computer-readable storage device encoded with data that, when implemented in a manufacturing facility, adapts the manufacturing facility to create an apparatus, wherein the apparatus comprises:

• at least one cache memory;
• at least one processing unit, communicatively coupled to the at least one cache memory, being adapted to execute one or more processing device instructions in an instruction stream;
• and
• an out-of-order speculation supervisor unit adapted to determine an availability of at least one hardware resource associated with the processing device, and adapted to generate an indication to insert a fencing instruction in response to the determined availability.

A non-transitory, computer-readable storage device encoded with data that, when executed by a processing device, adapts the processing device to perform a method, comprising:

• determining a number of outstanding out-of-order instructions in an instruction stream to be executed by a processing device;
• determining a number of hardware resources available for executing out-of-order instructions;
• and
• inserting at least one fencing instruction into the instruction stream in response to determining the number of outstanding out-of-order instructions exceeds the determined number of available hardware resources.

A non-transitory, computer-readable storage device encoded with data that, when executed by a processing device, adapts the processing device to perform a method, comprising:

• compiling a portion of source code, comprising:
• determining a speculative region associated with the portion of source code;
• generating a plurality of machine-level instructions based at least on the portion of source code;
• and
• inserting at least one fencing instruction into the plurality of machine-level instructions in response to determining the speculative region.