Methods and apparatus for source operand collector caching
AssigneeNVIDIA Corporation
InventorsJack Hilaire CHOQUETTE, Manuel Olivier Gautho, John Erik Lindholm
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AssigneeNVIDIA Corporation
InventorsJack Hilaire CHOQUETTE, Manuel Olivier Gautho, John Erik Lindholm
Estimating the term…
Methods and apparatus for source operand collector caching. In one embodiment, a processor includes a register file that may be coupled to storage elements (i.e., an operand collector) that provide inputs to the datapath of the processor core for executing an instruction. In order to reduce bandwidth between the register file and the operand collector, operands may be cached and reused in subsequent instructions. A scheduling unit maintains a cache table for monitoring which register values are currently stored in the operand collector. The scheduling unit may also configure the operand collector to select the particular storage elements that are coupled to the inputs to the datapath for a given instruction.
A method for executing instructions on a processor core implemented with a source operand collector cache coupled to at least one input of a data path residing within the processor core, the method comprising:
A computer-readable storage medium including instructions that, when executed by a processor core implemented with a source operand collector cache coupled to at least one input of a data path residing within the processor core, cause the processor core to perform the steps of:
A system comprising:
Dependencies are inferred from the claim text.