Pattern forming method

A pattern forming method of a wiring line that includes word lines that configure a non-volatile semiconductor memory device, extend in a first direction and are arranged in a second direction orthogonal to the first direction at a predetermined interval and selection gate lines that configure the non-volatile semiconductor memory device and are arranged to be adjacent to word lines at an end in the second direction among the predetermined number of arranged word lines and parallel to the word lines, comprising:

• forming a pattern in which a first pattern in which a plurality of first line patterns extending in the first direction are arranged in the second direction and a second pattern arranged so as to be spaced apart from an end in the second direction of the first pattern with a space at a predetermined interval therebetween are mixed above a processing object that configures the word lines and the selection gate lines;
• forming an inversion pattern having a periodic pattern in which the first line patterns of the first pattern and spaces therebetween are inverted and a non-periodic pattern arranged at an interval which is substantially equal to a width of the first line patterns from an end in the second direction of the periodic pattern so as to correspond to the spaces between the first line patterns in the first pattern and the space between the first pattern and the second pattern respectively above the processing object;
• conformally forming a sidewall film above the processing object above which the inversion pattern is formed;
• etching back the sidewall film so as to expose a top surface of the inversion pattern;
• selectively removing the periodic pattern of the inversion pattern whose top surface is exposed to form a sidewall pattern formed of the sidewall film above the processing object;
• and
• etching the processing object so as to transfer the sidewall pattern and the non-periodic pattern surrounded by the sidewall film.