Sub word line driver and semiconductor integrated circuit device
AssigneeHynix Semiconductor Inc.
InventorsTae Sik YUN, Dong Hwee KIM
Life of this patent
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Abstract
A sub word line driver and a semiconductor integrated circuit device having the same are provided. The semiconductor integrated circuit device includes adjacent four sub word line drivers configured to drive four sub word lines in response to signals of four main word lines, wherein first and second sub word line drivers of adjacent sub word line drivers share one keeper transistor with each other, and third and fourth sub word line drivers of the adjacent sub word line drivers share one keeper transistor with each other.
Claims20
A semiconductor integrated circuit device:
- a plurality of main word lines;
- and
- a plurality of sub word lines configured to be driven in response to a signal of each of the plurality of main word lines,
- wherein the plurality of sub word lines are extended toward a cell array area from regions of sub word line drivers, respectively disposed at both edges of the cell array area,
- one sub word line selected from a plurality of sub word lines extended from one region of the sub word line driver of the cell array area and another sub word line adjacent to the selected sub word line are driven in response to signals of different main word lines, respectively, and
- the signals of the different main word lines have different logic levels.
A sub word line driver of a semiconductor integrated circuit device, comprising:
- a semiconductor substrate configured to comprise an N-well having PMOS transistors formed therein and a P-well having NMOS transistors formed therein;
- four sub word lines configured to be extended in parallel over the N-well and P-well;
- first to fourth sub word line selection lines configured to be extended in a direction intersecting with the four sub word lines and formed on the N-well;
- a pair of VSS lines configured to be formed on the P-well and formed in parallel with the extended direction of the sub word lines;
- a first main word line configured to comprise a first part having two intersections with one two sub word line of the sub word line selection lines and a second part intersecting with the pair of the VSS lines;
- and
- a second main word line configured to comprise a first part having two intersections with an other two sub word line of the sub word line selection lines and a second part intersecting with the pair of the VSS lines.
A sub word line driver of a semiconductor integrated circuit device, comprising:
- a semiconductor substrate configured to comprise an N-well having PMOS transistors formed therein and a P-well having NMOS transistors formed therein;
- four sub word lines configured to be extended in parallel over the N-well and P-well;
- a sub word line selection line configured to be extended in a direction parallel with the four sub word lines;
- first and second VSS lines configured to be formed on the P-well, extended in a direction vertical to the extended direction of the sub word lines, and spaced apart from each other at a predetermined interval;
- a first main word line configured to comprise a pair of bar electrodes substantially intersecting with the four sub word lines and a branch electrode intersecting with the first VSS line;
- a second main word line configured to comprise a pair of bar electrodes substantially intersecting with the four sub word lines and a branch electrode intersecting with the second VSS line;
- a third main word line configured to comprise a pair of bar electrodes substantially intersecting with the four sub word lines and a branch electrode intersecting with the first VSS line;
- and
- a fourth main word line configured to comprise a pair of bar electrodes substantially intersecting with the four sub word lines and a branch electrode intersecting with the second VSS line,
- wherein the sub word line driver further comprises a first keeper transistor positioned between the branch electrodes of the first and third main word lines and a second keeper transistor positioned between the branch electrodes of the second and fourth main word lines.
A semiconductor integrated circuit device, comprising:
- a first sub word line driver configured to drive a first sub word line in response to a first main word line signal;
- a second sub word line driver configured to drive a second sub word line adjacent to the first sub word line in response to a second main word line signal;
- and
- wherein a logic level of the first main word line signal is different from that of the second main word line signal.
A semiconductor integrated circuit device, comprising adjacent four sub word line drivers configured to drive four sub word lines in response to signals of four main word lines,
- wherein first and second sub word line drivers of the adjacent sub word line drivers share one keeper transistor with each other, and third and fourth sub word line drivers of the adjacent sub word line drivers share one keeper transistor with each other.
Dependencies are inferred from the claim text.