Memory access control system and method
AssigneeATI Technologies ULC
InventorsRussell Schreiber, Vikram Suresh
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Abstract
The present disclosure relates to a method and system for controlling memory access. In particular, a method for controlling memory access includes, in response to receiving a write request operative to write data to at least one memory cell of a plurality of memory cells, increasing a word line voltage above a nominal level after a predetermined delay following the receipt of the write request. A disclosed system includes a word line driver operative to increase a word line voltage above a nominal level during a write access after a predetermined delay in response to a write request.
Claims30
A method for controlling memory access comprising:
- in response to receiving a write request operative to write data to at least one memory cell of a plurality of memory cells, increasing a word line voltage above a nominal level after a predetermined delay following the receipt of the write request.
A method for controlling memory access comprising:
- during a write access initiated by a write request, driving a word line voltage below a nominal level;
- and
- during the same write access, increasing the word line voltage above the nominal level after a predetermined delay following the write request.
A memory access control system comprising:
- a word line driver operative to increase a word line voltage above a nominal level during a write access after a predetermined delay in response to a write request operative to cause data to be written to at least one memory cell of a plurality of memory cells.
A computer readable medium comprising:
- executable instructions for execution by an integrated circuit production system such that when executed cause the integrated circuit production system to produce an integrated circuit comprising:
- a word line driver operative to increase a word line voltage above a nominal level during a write access after a predetermined delay in response to a write request operative to cause data to be written to at least one memory cell of a plurality of memory cells.
A computer readable medium comprising:
- data representing a library cell comprised of:
- a word line driver operative to increase a word line voltage above a nominal level during a write access after a predetermined delay in response to a write request operative to cause data to be written to at least one memory cell of a plurality of memory cells.
Dependencies are inferred from the claim text.