Data sensing circuit and memory device including the same

A data sensing circuit, comprising:

• an input line;
• an output line;
• a first transistor configured to couple the input line with the output line in response to a precharge signal;
• and
• a second transistor configured to have a gate coupled with the input line and form a current path between the output line and a sinking end.

A bit line sense amplifier, comprising:

• a current source configured to supply a reference current to an output line;
• a switching unit configured to couple a bit line with the output line during a precharge operation of the bit line;
• and
• a current sinking unit configured to sink a current from the output line in response to a voltage level of the bit line.

A memory device, comprising:

• a memory cell;
• a bit line onto which a data of the memory cell is loaded;
• a current source configured to supply a reference current to an output line;
• a switching unit configured to couple the bit line with the output line during a precharge operation of the bit line;
• a current sinking unit configured to sink a current from the output line in response to a voltage level of the bit line;
• and
• a comparison unit configured to compare a voltage level of the output line with a voltage level of the reference current and drive a data bus.

A data sensing circuit, comprising:

• a current source configured to supply a reference current to an output line;
• a current sinking unit configured to sink a current from the output line in response to a voltage level of the input line;
• a comparison unit configured to compare a voltage level of the output line with a voltage level of the reference current and drive a data bus;
• and
• a switching unit configured to transfer a voltage of the data bus to the input line during a precharge operation of the input line.