Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device comprising:

• a semiconductor substrate;
• a memory cell array including a plurality of memory strings formed above the semiconductor substrate, each memory string including a plurality of memory cells, a part of memory cells being configured to stacked above the semiconductor substrate;
• a sense amplifier for reading data of the memory cell array;
• and
• a control circuit configured to control a plurality of voltages applied to the memory cell array and the sense amplifier,
• wherein the sense amplifier includes:
• a first current path including a first transistor configured such that one end of the current path is electrically connected to a first bit line and a second transistor configured such that one end of the current path is electrically connected to the other end of the first transistor and the other end is electrically connected to a first source line and a second source line;
• and
• a second current path including a third transistor configured such that one end of the current path is electrically connected to the first bit line and the other end is electrically connected to the first source line and the second source line,
• in a read operation, if the first bit line and the first source line are electrically connected to a read-target memory cell and the second source line is electrically connected to an unselected memory string,
• the control circuit precharges the second source line to a second voltage higher than a first voltage when the first source line is precharged to the first voltage,
• the control circuit precharges the first bit line to the first voltage when the first source line and the second source line are precharged,
• when the first bit line is precharged to the first voltage, the control circuit changes the first transistor, the second transistor, and the third transistor to an ON state, thereby short-circuiting the first bit line and a potential of the first source line, and
• a voltage applied to a gate of the first transistor is higher than a voltage applied to a gate of the second transistor.

A nonvolatile semiconductor memory device comprising:

• a semiconductor substrate;
• a memory cell array including memory strings formed above the semiconductor substrate, each memory string including a plurality of memory cells, a part of memory cells being configured to stacked above the semiconductor substrate;
• a sense amplifier for reading data of the memory cell array;
• and
• a control circuit configured to control a plurality of voltages applied to the memory cell array and the sense amplifier,
• wherein the sense amplifier includes:
• a first current path including a first transistor configured such that one end of the current path is electrically connected to a first bit line and the other end is electrically connected to a first source line and a second source line;
• and
• a second current path including a second transistor configured such that one end of the current path is electrically connected to the first bit line and the other end is electrically connected to the first source line and the second source line,
• in a read operation, if the first bit line and the first source line are electrically connected to a read-target memory cell and the second source line is electrically connected to an unselected memory string,
• the control circuit precharges the second source line to a second voltage higher than a first voltage when the first source line is precharged to the first voltage,
• the control circuit precharges the first bit line to the first voltage when the first source line and the second source line are precharged,
• when the first bit line is precharged to the first voltage, the control circuit changes the first transistor and the second transistor to an ON state, thereby short-circuiting the first bit line and a potential of the first source line, and
• a voltage applied to a gate of the first transistor is higher than a summation voltage of the first voltage and a threshold value voltage of the first transistor.