Non-Volatile Memory And Method With Improved First Pass Programming

A method of programming a nonvolatile memory, comprising:

• providing the nonvolatile memory with an array of memory cells, each memory cell having a common range of threshold voltages defining a threshold window;
• configuring each memory cell to store N bits of data by partitioning the threshold window into 2N=k+1 bands of threshold voltages using k demarcation points D(i), where a lowest band denotes an erased state and is followed by k increasing bands that denotes k increasing programmed states P(i);
• providing a programming voltage as a series of pulses;
• programming in multiple programming passes a page of memory cells on a selected word line to respective target states;
• said multiple programming passes including a first programming pass and one of more subsequent programming passes to program all memory cells of the page to respective target states;
• and wherein the first programming pass further comprises:
• programming and verifying pulse by pulse a first set memory cells of the page having target states among an upper half of the k increasing programmed states, beginning with P([k+1]/2) and ending with P(k);
• said verifying is relative to a predetermined threshold voltage, the predetermined verify threshold voltage is such that it enables verifying of programming of all the memory cells having target states being one of P([k+1]/2) to P(k) to be placed near the middle of the threshold window while not exceeding D([k+1]/2+1);
• inhibiting programming of each memory cell of the first set that has been program-verified relative to the predetermined verify threshold voltage;
• and
• while ongoing programming pulses are still being applied to the page of memory cells until all memory cells of the first set have been program-verified relative to the predetermined verify threshold,
• selectively disabling said inhibiting programming of each memory cell having a target state P([k+1]/2+x) to programming with up to x additional ongoing programming pulses, without intervening program-verifying.

A nonvolatile memory, comprising:

• an array of memory cells, each memory cell having a common range of threshold voltages defining a threshold window;
• each memory cell configured to store N bits of data by having the threshold window partitioned into 2N=k+1 bands of threshold voltages using k demarcation points D(i), where a lowest band denotes an erased state and is followed by k increasing bands that denotes k increasing programmed states P(i);
• a power supply for providing a programming voltage as a series of pulses;
• a control circuit for controlling programming in multiple programming passes a page of memory cells on a selected word line to respective target states;
• said multiple programming passes including a first programming pass and one of more subsequent programming passes to program all memory cells of the page to respective target states;
• and wherein the first programming pass further comprises:
• programming and verifying pulse by pulse a first set memory cells of the page having target states among an upper half of the k increasing programmed states, beginning with P([k+1]/2) and ending with P(k);
• said verifying is relative to a predetermined threshold voltage, the predetermined verify threshold voltage is such that it enables verifying of programming of all the memory cells having target states being one of P([k+1]/2) to P(k) to be placed near the middle of the threshold window while not exceeding D([k+1]/2+1);
• inhibiting programming of each memory cell of the first set that has been program-verified relative to the predetermined verify threshold voltage;
• and
• after all memory cells of the first set have been program-verified relative to the predetermined verify threshold,
• selectively disabling said inhibiting programming of each memory cell having a target state P([k+1]/2+x to programming with additional x pulses, without intervening program-verifying.

A nonvolatile memory, comprising:

• an array of memory cells, each memory cell having a common range of threshold voltages defining a threshold window;
• each memory cell configured to store N bits of data by having the threshold window partitioned into 2N=k+1 bands of threshold voltages using k demarcation points D(i), where a lowest band denotes an erased state and is followed by k increasing bands that denotes k increasing programmed states P(i);
• a power supply for providing a programming voltage as a series of pulses;
• a control circuit for controlling programming in multiple programming passes a page of memory cells on a selected word line to respective target states;
• said multiple programming passes including a first programming pass and one of more subsequent programming passes to program all memory cells of the page to respective target states;
• and wherein the first programming pass further comprises:
• programming and verifying pulse by pulse a first set memory cells of the page having target states among an upper half of the k increasing programmed states, beginning with P([k+1]/2) and ending with P(k);
• said verifying is relative to a predetermined threshold voltage, the predetermined verify threshold voltage is such that it enables verifying of programming of all the memory cells having target states being one of P([k+1]/2) to P(k) to be placed near the middle of the threshold window while not exceeding D([k+1]/2+1);
• inhibiting programming of each memory cell of the first set that has been program-verified relative to the predetermined verify threshold voltage;
• and
• while ongoing programming pulses are still being applied to the page of memory cells until all memory cells of the first set have been program-verified relative to the predetermined verify threshold,
• selectively disabling said inhibiting programming of each memory cell having a target state P([k+1]/2+x) to programming with up to x additional ongoing programming pulses, without intervening program-verifying.