Phase change memory device, operation method thereof, and data storage device having the same
AssigneeSK hynix Inc.
InventorsSun Hyuck YON, Dong Keun KIM
Life of this patent
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Abstract
A phase change memory device includes: a memory cell arranged at a region where a word line and a bit line cross each other; and a control logic including: a program control logic configured to control a program operation of the memory cell; a read control logic configured to control a read operation of the memory cell; and an operation complete signal transfer unit configured to adjust a transfer time point of an operation complete signal transferred between the program control logic and the read control logic.
Claims20
A phase change memory device comprising:
- a memory cell arranged at a region where a word line and a bit line cross each other;
- and
- control logic comprising:
- program control logic configured to control a program operation of the memory cell;
- read control logic configured to control a read operation of the memory cell;
- and
- an operation complete signal transfer unit configured to adjust a transfer time point of an operation complete signal transferred between the program control logic and the read control logic.
An operation method of a phase change memory device, comprising the steps of:
- applying a program current to a selected memory cell;
- delaying transfer of a program complete signal indicating that the step of applying the program current was performed;
- and
- verifying a program state of the selected memory cell in response to the delayed program complete signal.
A data storage device comprising:
- a phase change memory device;
- and
- a controller configured to the control the phase change memory device,
- wherein the phase change memory device comprises:
- a memory cell arranged at a region where a word line and a bit line cross each other;
- and
- a control logic comprising:
- program control logic configured to control a program operation of the memory cell;
- read control logic configured to control a read operation of the memory cell;
- and an operation complete signal transfer unit configured to adjust a transfer time point of an operation complete signal transferred between the program control logic and the read control logic.
Dependencies are inferred from the claim text.