Interleaved noise reduction circuit and method
AssigneeSemiconductor Components Industries, LLC
InventorsRobert B. Smith, Stan Latimer, Morgan Ercanbrack
Life of this patent
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Abstract
In accordance with an embodiment, a noise reduction circuit includes one or more phase sampling circuits that receive an electromagnetic signal and splits the signal into an illuminated component and an ambient component. The illuminated component is transmitted along an illuminated signal path and converted to a digital signal and the ambient component is transmitted along an ambient signal path and converted to a digital signal. The digitized ambient component is subtracted from the digitized illuminated component to generate a light signal with a reduced noise component.
Claims24
A noise reduction circuit, comprising:
- a first signal path that generates a first component of a first signal;
- a second signal path that generates a second component of the first signal;
- and
- a difference circuit having a first input coupled for receiving the first component of the first signal, a second input for receiving the second component of the first signal, and an output.
A method for reducing noise, comprising:
- providing a drive signal;
- determining an ambient component of a first signal in response to a first portion of drive signal;
- determining an illuminated component of the first signal in response to a second portion of the drive signal;
- and
- subtracting the ambient component from the illuminated component to form an output signal.
A method for reducing noise, comprising:
- sampling a first signal in response to a clock signal to generate a first sampled signal;
- sampling the first signal in response to an inverted clock signal to generate a second sampled signal;
- converting the first sampled signal into a first component;
- converting the second sampled signal into a second component;
- and
- subtracting the first component from the second component to generate an output signal.
A phase sampling circuit, comprising:
- a filtering current mirror having an input terminal and an output terminal;
- a bias stage coupled to the output terminal of the filtering current mirror, wherein the bias stage increases a current flowing from the output terminal of the filtering current mirror;
- a current diverter coupled to the output terminal of the filtering current mirror;
- a current mirror having an input terminal coupled to the output terminal of the filtering current mirror and an output terminal;
- and
- an output stage having an input terminal and first and second output terminals, the input terminal coupled to the output terminal of the current mirror.
Dependencies are inferred from the claim text.