US 2013/0154066 A1Published application

Semiconductor package and manufacturing method thereof

AssigneeAmkor Technology, Inc.

InventorsDong In Kim, Jae Ung Lee, Eunnara Cho, Min Ju Kim

Life of this patent

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Abstract

A semiconductor package is presented which has a suitable structure for effectively shielding electromagnetic wave interference (EMI) in a cavity area to which a semiconductor chip is attached. The semiconductor package is assembled such that a lower substrate to which the semiconductor chip is attached is adhered to an EMI shielding & electric I/O body having various types of EMI shielding & electric I/O metal patterns by soldering. Further, the EMI shielding & electric I/O body is adhered to an upper substrate by soldering thereby simplifying assembling of the semiconductor package.

Claims20

Dependent claims

A semiconductor package comprising:

a lower substrate;
a semiconductor chip coupled to a cavity area of the lower substrate;
an electromagnetic wave interference (EMI) shielding & electric input/output (I/O) body formed to surround the cavity area and coupled to the lower substrate by soldering;
and
an upper substrate coupled to the EMI shielding & electric I/O body by soldering,
wherein the EMI shielding & electric I/O body comprises:
an EMI shielding & electric I/O hole formed to pass through top and bottom portions of the EMI shielding & electric I/O body;
and
a first EMI shielding & electric I/O metal pattern coupled to an inner wall of the EMI shielding & electric I/O hole and portions of the top and bottom portions of the EMI shielding & electric I/O body, and comprising a first lower metal pattern coupled to the lower substrate by soldering and a first upper metal pattern coupled to the upper substrate by soldering.

6 more elements

A semiconductor package comprising:

a lower substrate;
a semiconductor chip coupled to a cavity area of the lower substrate;
an electromagnetic wave interference (EMI) shielding & electric input/output (I/O) body formed to surround the cavity area and coupled to the lower substrate by soldering;
and
an upper substrate coupled to the EMI shielding & electric I/O body by soldering,
wherein the EMI shielding & electric I/O body comprises:
a first EMI shielding & electric I/O hole formed to pass through top and bottom portions of the EMI shielding & electric I/O body;
a first EMI shielding & electric I/O metal pattern coupled to an inner wall of the EMI shielding & electric I/O hole and portions of the top and bottom portions of the EMI shielding & electric I/O body and comprising a first lower metal pattern coupled to the lower substrate by soldering, and a first upper metal pattern coupled to the upper substrate by soldering;
and
a second EMI shielding & electric I/O hole;
a second EMI shielding & electric I/O metal pattern comprising conductive paste filling the second EMI shielding & electric I/O hole, the second EMI shielding & electric I/O metal pattern further comprising a second lower metal pattern coupled to the lower substrate by soldering and a second upper metal pattern coupled to the upper substrate by soldering.

8 more elements

A semiconductor package comprising:

a lower substrate;
an electromagnetic wave interference (EMI) shielding & electric input/output (I/O) body comprising:
a top surface;
a bottom surface;
inner sidewalls defining a cavity;
a first EMI shielding & electric I/O hole extending through the EMI shielding & electric I/O body from the top surface to the bottom surface;
and
a first EMI shielding & electric I/O metal pattern at least partially filling the first EMI shielding & electric I/O hole, the first EMI shielding & electric I/O metal pattern comprising:
a first lower metal pattern coupled to the bottom surface;
and
a first upper metal pattern coupled to the top surface;
a first lower solder coupling the first lower metal pattern to the lower substrate;
an upper substrate;
and
a first upper solder coupling the first upper metal pattern to the upper substrate.

12 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/739,565Filed 11 Jan 2013
Priority: KR 10-2012-003772412 Apr 2012
Published: 20 Jun 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10W 42/20
Arrangements for protection of devices: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
H10W 95/00
Packaging processes not covered by the other groups of this subclass
H04R 19/005
Electrostatic transducers: using semiconductor materials
H04R 19/04
Electrostatic transducers: microphones

Family

US 9,018,741 B2Related patent
US 2013/0154066 A1This patent

From the US filing history. Foreign family members aren’t listed.

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