Embedded stressors for multigate transistor devices

A method for fabricating a multigate transistor device comprising:

• forming a fin and a gate structure that is disposed on a plurality of surfaces of the fin;
• removing at least a portion of an extension of the fin to form a recessed portion that is under the gate structure, is under a channel region of the fin, and includes at least one angled indentation, wherein the channel region is the portion of the fin that provides the conductive channel for charge carriers between a source and a drain of the device;
• and
• growing a terminal extension in the at least one angled indentation under the channel region and along a surface of the channel region such that the terminal extension provides a stress on the channel region to enhance charge carrier mobility in the channel region and such that the terminal extension is the source or the drain of the device.