US 2013/0153995 A1Published application

Semiconductor device and method for manufacturing the same

AssigneeKabushiki Kaisha Toshiba

InventorsHiroto MISAWA, Hideki Okumura

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Abstract

A semiconductor device includes a first region with second conductivity type formed over a semiconductor layer with first conductivity type. On this first region, the second region of the first conductivity type is selectively provided. On the same first region, a third region of second conductivity type is also selectively provided and is adjoined to the second region. The first control electrode is provided within a trench located deeper than the first side of the second region compared to the first region. The first control electrode includes a part opposed to the first and second regions separated by a first insulator, and a second part opposed to the semiconductor layer separated by a thicker second insulator. Inside the trench, the second control electrode is provided between the trench bottom and the first control electrode. The second control electrode is opposed to the semiconductor layer through a third insulator.

Claims20

Dependent claims

A semiconductor device comprising;

a semiconductor layer of a first conductivity type;
a first region, of a second conductivity type, provided on a first surface of the semiconductor layer of the first conductivity type;
a second region, of the first conductivity type, provided selectively on the first region;
a third region, of the second conductivity type, which is provided selectively and is adjoined to the second region, on the first region;
a trench, extending through the first region and the second region, and extending inwardly of, and terminating within, the semiconductor layer of a first conductivity type;
a first control electrode disposed within the trench, the electrode having a first end situated to oppose a portion of the second region;
the first control electrode including a first part, which is opposed to the first and the second region through a first insulator, and a second part, which is opposed to the semiconductor layer through a second insulator, the second insulator having a thickness separating the second part of the electrode from the adjacent semiconductor layer having a first conductivity type which is thicker than the thickness of the first insulator extending between the first part of the first electrode and the adjacent first region and second region;
a second control electrode, which is formed within the trench between the terminus of the trench in the semiconductor layer of a first conductivity type, and the first control electrode;
the second control electrode is opposed to the semiconductor layer, through a third insulator, and the third insulator is thicker than the thickness of the second insulator separating the second part of the electrode from the adjacent semiconductor layer having a first conductivity type;
a first electrode, which is electrically connected to the semiconductor layer of a first conductivity type;
and
a second electrode, which is electrically connected to the second and third regions.

9 more elements

A method for manufacturing a semiconductor device comprising the steps of:

providing a semiconductor layer of a first conductivity type and having a first field surface and a second, opposed, surface;
extending a trench from the field surface inwardly of the semiconductor layer of a first conductivity type;
depositing an insulating layer over the field side and surfaces of the trench, leaving a smaller, trench shaped void therein;
depositing a field electrode material into the trench shaped void;
etching the insulating film, disposed adjacent to the field side of the semiconductor layer, to thereby thin the first portion of the insulating film to a first depth;
etching back the field electrode material to form the field electrode having an upper face;
etching the insulating film to reduce the sidewall thickness thereof in a second region between the first region and the base of the trench, and simultaneously remove the first portion of the insulator, to yield a second insulator layer having a second thickness and leaving a third insulating layer intermediate of the field electrode and adjacent trench wall, having a third thickness greater than the second thickness;
oxidizing the exposed portion of the trench wall to form a first insulating layer in the trench, the first thickness of the first thickness insulating layer being less that the thickness of the second layer;
forming a fourth insulating layer, having a fourth thickness, over the exposed surface of the field electrode to form a fourth insulating layer;
depositing a second electrode material into the remaining trench like opening;
and
etching second electrode material to form a gate electrode contacting both the first insulating layer and the

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/607,449Filed 7 Sep 2012
Priority: JP 2011-27327514 Dec 2011
Published: 20 Jun 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

H10D 30/668
Vertical dmos [vdmos] fets: having trench gate electrodes, e.g. UMOS transistors
H10D 12/481
Having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions: having gate…
H10D 30/0297
Of vertical dmos [vdmos] fets: using recessing of the gate electrodes, e.g. to form trench gate electrodes
H10D 64/117
Field plates: recessed field plates, e.g. trench field plates or buried field plates

Family

No related US applications are recorded in the indexed filing history.

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