Back to results
US 2013/0093494 A1Published application
Differential current buffer
AssigneeAnalog Devices, Inc.
InventorEdmund Balboni
Life of this patent
Estimating the term…
Abstract
Apparatus and methods provide a differential current buffer. The current buffer has cross-coupled feedback and offers relatively good common-mode rejection and a relatively low and linear input impedance, which can reduce intermodulation distortion. The current buffer can be used in, for example, an RF modulator, such as a quadrature modulator.
Claims30
An apparatus comprising:
- a first current buffer comprising:
- a first input configured to receive a non-inverted input signal current;
- a second input configured to receive an inverted input signal current;
- a first transistor of a first type, the first transistor having a base, an emitter, and a collector or a gate, a source, and a drain, wherein the base or gate of the first transistor is coupled to the first input;
- a second transistor of the first type, the second transistor having a base, an emitter, and a collector or a gate, a source, and a drain, wherein the base or gate of the second transistor is coupled to the second input;
- a first current source having an end coupled to the emitter or source of the first transistor;
- a second current source having an end coupled to the emitter or source of the second transistor;
- a first resistor having a first end coupled to the base or gate of the first transistor and a second end coupled to a reference voltage;
- a second resistor having a first end coupled to the base or gate of the second transistor and a second end coupled to the reference voltage;
- a third transistor of a second type different from the first type, the third transistor having a base, an emitter, and a collector or a gate, a source, and a drain, wherein the base or gate of the third transistor is coupled to the emitter or source of the first transistor, wherein the emitter or source of the third transistor is coupled to the base or gate of the second transistor, wherein the collector or drain of the third transistor is configured to provide a non-inverted output current signal;
- and
- a fourth transistor of the second type, the fourth transistor having a base, an emitter, and a collector or a gate, a source, and a drain, wherein the base or gate of the fourth transistor is coupled to the emitter or source of the second transistor, wherein the emitter or source of the fourth transistor is coupled to the base or gate of the first transistor, wherein the collector or drain of the fourth transistor is configured to provide an inverted output current signal.
9 more elements
An apparatus comprising:
- a first current buffer comprising:
- a first buffer circuit comprising at least an input stage cascaded with an output stage, wherein the input stage has a first input node configured to receive a non-inverted input signal current of a differential input signal, wherein the output stage has a low-impedance node and a first output node, wherein the output stage is configured to generate a non-inverted output signal at the first output node;
- a second buffer circuit comprising at least an input stage cascaded with an output stage, wherein the input stage has a second input node configured to receive an inverted input signal current of the differential input signal, wherein the output stage has a low-impedance node and a second output node, wherein the output stage is configured to generate an inverted output signal at the second output node;
- and
- a cross-coupled feedback circuit configured to connect the low-impedance node of the second buffer circuit to the first input node and to connect the low-impedance node of the first buffer circuit to the second input node such that the first node and the second node are configured to have input impedances less than input impedances without the presence of the cross-coupled feedback circuit.
2 more elements
An apparatus comprising:
- a first current buffer comprising:
- a first buffer circuit comprising at least an input stage cascaded with an output stage, wherein the input stage has a first input node configured to receive a non-inverted input signal current of a differential input signal, wherein the output stage has a low-impedance node and a first output node, wherein the output stage is configured to generate a non-inverted output signal at the first output node;
- a second buffer circuit comprising at least an input stage cascaded with an output stage, wherein the input stage has a second input node configured to receive an inverted input signal current of the differential input signal, wherein the output stage has a low-impedance node and a second output node, wherein the output stage is configured to generate an inverted output signal at the second output node;
- and
- a means for cross-coupling feedback from the low-impedance node of the second buffer circuit to the first input node and from the low-impedance node of the first buffer circuit to the second input node such that an input impedance of the first node and an input impedance of the second node are less than the input impedances without the presence of the cross-coupled feedback circuit.
2 more elements
A method for buffering current, the method comprising:
- receiving a non-inverted input signal current of a differential input signal at a first input node of an input stage of a first buffer circuit, wherein the first buffer circuit further comprises an output stage cascaded with the input stage, wherein the output stage has a low-impedance node and a first output node;
- generating a non-inverted output signal at the first output node from the non-inverted input signal current;
- receiving an inverted input signal current of the differential input signal at a second input node of an input stage of a second buffer circuit, wherein the second buffer circuit further comprises an output stage cascaded with the input stage, wherein the output stage has a low-impedance node and a second output node;
- generating an inverted output signal at the second output node from the inverted input signal current;
- and
- cross-coupling feedback from the low-impedance node of the second buffer circuit to the first input node and from the low-impedance node of the first buffer circuit to the second input node such that an input impedance of the first node and an input impedance of the second node are less than the input impedances without the presence of the cross-coupled feedback circuit.
3 more elements
Dependencies are inferred from the claim text.