Electrical erasable programmable read-only memory and manufacturing method thereof
AssigneeDongou HiTek Co., Ltd.
InventorYong Keon CHOI
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Abstract
An electrical erasable programmable read-only memory (EEPROM) including a floating transistor formed on a semiconductor substrate and a tunneling transistor formed on a semiconductor substrate and configured to erase electrons trapped in the floating transistor. The tunneling transistor has a source junction region and a drain junction region that are integrally joined by lateral diffusion. The EPROM maintains a small cell size without any additional mask process, and is useable as an MTP EEPROM because electrical erasure is enabled. In addition, the adjustment of the width of a gate constituting the tunneling transistor ensures an improved degree of freedom to adjust an erasure voltage can be enhanced.
Claims10
An electrical erasable programmable read-only memory (EEPROM), comprising:
- a floating transistor formed on a semiconductor substrate;
- and
- a tunneling transistor formed on the semiconductor substrate and configured to erase electrons trapped in the floating transistor,
- wherein the tunneling transistor has a source junction region and a drain junction region that are integrally joined by lateral diffusion.
A method for manufacturing an electrical erasable programmable read-only memory (EEPROM), the method comprising:
- forming a floating gate and a tunneling gate on a semiconductor substrate;
- forming a floating transistor by forming a source junction region and a drain junction region in contact with the floating gate;
- and
- forming a tunneling transistor by forming a source junction region and a drain junction region integrally joined by lateral diffusion so as to be in contact with the tunneling gate.
Dependencies are inferred from the claim text.