Semiconductor device and method for manufacturing semiconductor device

A semiconductor device comprising:

• a first transistor comprising a first gate electrode layer;
• and
• a second transistor comprising:
• a source electrode layer and a drain electrode layer, the source electrode layer being in contact with the first gate electrode layer;
• an oxide semiconductor layer comprising a first impurity region in contact with a side surface of the source electrode layer, a second impurity region in contact with a side surface of the drain electrode layer, and a channel formation region between the first impurity region and the second impurity region;
• a gate insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer;
• a second gate electrode layer over the gate insulating layer;
• a first conductive sidewall layer in contact with one side surface of the second gate electrode layer;
• and
• a second conductive sidewall layer in contact with the other side surface of the second gate electrode layer,
• wherein a length of an upper surface of the oxide semiconductor layer is longer than a length of a lower surface of the oxide semiconductor layer,
• wherein at least part of the first conductive sidewall layer overlaps with the source electrode layer with the gate insulating layer therebetween, and
• wherein at least part of the second conductive sidewall layer overlaps with the drain electrode layer with the gate insulating layer therebetween.

A method for manufacturing a semiconductor device, comprising the steps of:

• forming a source electrode layer and a drain electrode layer;
• forming an oxide semiconductor layer between the source electrode layer and the drain electrode layer;
• forming a gate insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer;
• forming a gate electrode layer over the oxide semiconductor layer;
• introducing an impurity into the oxide semiconductor layer using the gate electrode layer as a mask to form a first impurity region and a second impurity region in the oxide semiconductor layer;
• and
• forming a first conductive sidewall layer and a second conductive sidewall layer with the gate electrode layer,
• wherein a length of an upper surface of the oxide semiconductor layer is longer than a length of a lower surface of the oxide semiconductor layer,
• wherein at least part of the first conductive sidewall layer overlaps with the source electrode layer with the gate insulating layer therebetween, and
• wherein at least part of the second conductive sidewall layer overlaps with the drain electrode layer with the gate insulating layer therebetween.