Semiconductor device and method for manufacturing the same, and liquid crystal display device

A method for manufacturing a semiconductor device comprising the steps of:

• forming a gate electrode having a predetermined shape on an insulating substrate;
• forming and stacking a first insulating material layer, a semiconductor material layer, and a second insulating material layer successively on the insulating substrate to cover the gate electrode;
• forming a resist pattern on a surface of the second insulating material layer;
• etching the second insulating material layer, the semiconductor material layer, and the first insulating material layer using the resist pattern as a mask, thereby forming a semiconductor layer of the semiconductor material layer having a predetermined shape, a gate insulating film of the first insulating material layer having the same shape as that of the semiconductor layer, and an interlayer insulating film of the second insulating material layer with an end portion of the semiconductor layer being exposed from the interlayer insulating film;
• and
• forming an electrode layer covering a portion of the interlayer insulating film and a portion of the semiconductor layer with the electrode layer being connected to an end portion of the semiconductor layer.

A liquid crystal display device including an element substrate on which a plurality of semiconductor elements are formed, a counter substrate facing the element substrate, and a liquid crystal layer provided between the counter substrate and the element substrate, wherein

• the element substrate includes a gate electrode formed on an insulating substrate, a gate insulating film covering the gate electrode, a first semiconductor layer formed on a surface of the gate insulating film and having a channel region facing the gate electrode, and an electrode layer connected to the first semiconductor layer,
• an island-shaped first interlayer insulating film covering the channel region is formed on a surface of the first semiconductor layer,
• an end portion of the first interlayer insulating film is interposed between the first semiconductor layer and the electrode layer,
• outer edges of the first interlayer insulating film are located further inside than respective corresponding outer edges of the first semiconductor layer by the same width, as viewed in a normal direction of a surface of the insulating substrate, and
• the electrode layer is connected to an end portion of the first semiconductor layer.