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US 2013/0075820 A1Published application
Superior Integrity of High-K Metal Gate Stacks by Forming STI Regions After Gate Metals
AssigneeGlobalfoundries Inc.
InventorsThilo Scheiper, Peter Baars
Life of this patent
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Abstract
When forming sophisticated high-k metal gate electrode structures in an early manufacturing stage, superior process robustness, reduced yield loss and an enhanced degree of flexibility in designing the overall process flow may be accomplished by forming and patterning the sensitive gate materials prior to forming isolation regions.
Claims20
A method, comprising:
- forming a gate dielectric material and a first electrode material on a semiconductor layer of a semiconductor device;
- forming an isolation region in said semiconductor layer so as to laterally delineate active regions in said semiconductor layer, said isolation region extending through said gate dielectric material and said first electrode material;
- forming a second electrode material above said active region and said isolation region;
- and
- forming gate electrode structures at least from said second electrode material, said gate dielectric material and said first electrode material.
2 more elements
A method, comprising:
- forming a first part of a first gate layer stack above a first portion of a semiconductor layer of a semiconductor device;
- forming a first part of a second gate layer stack on a second portion of said semiconductor layer;
- forming an isolation region in said semiconductor layer so as to laterally separate said first parts of said first and second gate layer stacks;
- forming a second part of said first and second gate layer stacks above said first parts and above said isolation region;
- and
- forming a first gate electrode structure of a first transistor from said first and second parts of said first gate layer stack and a second gate electrode structure of a second transistor from said first and second parts of said second gate layer stack, said first and second transistors differing in conductivity type.
3 more elements
A semiconductor device comprising:
- an active region laterally delineated by an isolation region;
- and
- a gate electrode structure formed on said active region and having an end portion positioned above said isolation region, said gate electrode structure comprising a high-k dielectric material formed on said active region and extending to said isolation region without overlapping said isolation region.
Dependencies are inferred from the claim text.