Non-volatile memory device and program method thereof
AssigneeHynix Semiconductor Inc.
InventorMi-Sun YOON
Life of this patent
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Abstract
A method for programming a non-volatile memory device including a plurality of memory cells includes verifying whether the memory cells are programmed or not by applying a program verification bias voltage, which is calculated and stored during an initialization operation preformed before the programming of the memory cells, after a program voltage is applied to word lines of the memory cells.
Claims15
A method for programming a non-volatile memory device including a plurality of memory cells, comprising:
- verifying whether the memory cells are programmed or not by applying a program verification bias voltage, which is calculated and stored during an initialization operation preformed before the programming of the memory cells, after a program voltage is applied to word lines of the memory cells.
A method for programming a non-volatile memory device including a plurality of memory cells, comprising:
- generating and storing a program verification bias voltage corresponding to the memory cells by summing a characteristic voltage of a group of memory cells and a default bias voltage before a program pulse is applied to the memory cells;
- and
- verifying whether the memory cells are programmed or not by applying the stored program verification bias voltage to a word line of the memory cells when the program voltage is applied to the memory cells.
A non-volatile memory device, comprising:
- a plurality of memory cells;
- and
- a program verification bias voltage providing unit configured to calculate and store a program verification bias voltage corresponding to the memory cells during an initialization operation and provide the stored program verification bias voltage after a program voltage is applied to a word line of the memory cells during a program operation.
A non-volatile memory device, comprising:
- a memory cell block comprising a plurality of memory cells;
- a computation unit configured to generate a program verification bias voltage corresponding to the memory cells by summing a default bias voltage and a characteristic voltage of a memory cell before a program pulse is applied to the memory cells;
- a storage unit configured to store the generated program verification bias voltage;
- and
- a program verification bias voltage providing unit configured to provide the program verification bias voltage stored in the storage unit to a word line of the memory cells when a program pulse is applied to the memory cells.
Dependencies are inferred from the claim text.