Flash Memory Device and Method for Handling Power Failure Thereof
AssigneeSilicon Motion, Inc.
InventorHung-Chiang Chen
Life of this patent
Estimating the term…
Abstract
A flash memory device. In one embodiment, the flash memory device comprises a flash memory, a diode, a controller, and a capacitor. The flash memory has a voltage source pin. The diode is coupled between a voltage source and the voltage source pin of the flash memory. The controller is coupled to the flash memory via a data bus. The capacitor is coupled between the voltage source pin of the flash memory and a ground, and supplies power to the flash memory to enable the flash memory to complete writing of at least one data page when the level of the voltage source is lowered.
Claims15
A flash memory device, comprising:
- a flash memory, having a voltage source pin and a first ready/busy pin, wherein the voltage source pin is coupled to a voltage source;
- a controller, having a second read/busy pin, wherein the second ready/busy pin is coupled to the first ready/busy pin, and when the flash memory processes a first write command, the flash memory sets the voltage of the first ready/busy pin to be equal to a specific level;
- and
- a power failure handling circuit, coupled between the voltage source and the second ready/busy pin, detecting whether the level of the voltage source has been kept at a predetermined level, and setting the level of the second ready/busy pin to be the specific level to prevent the controller from sending a second write command to the flash memory when the level of the voltage source is lower than the predetermined level.
A flash memory device, comprising:
- a flash memory, having a voltage source pin;
- a diode, coupled between a voltage source and the voltage source pin of the flash memory;
- a controller, coupled to the flash memory via a data bus;
- and
- a capacitor, coupled between the voltage source pin of the flash memory and a ground, supplying power to the flash memory to enable the flash memory to complete writing of at least one data page when the level of the voltage source is lowered.
A method for handling power failure of a flash memory device, wherein the flash memory device comprises a controller, a flash memory, and a power failure handing circuit, the method comprising:
- coupling a first ready/busy pin of the flash memory to a second ready/busy pin of the controller, wherein when the flash memory processes a first write command, the flash memory sets the voltage of the first ready/busy pin to be equal to a specific level;
- coupling a power failure handling circuit between a voltage source and the second ready/busy pin of the controller;
- detecting whether the level of the voltage source has been kept at a predetermined level with the power failure handing circuit;
- when the level of the voltage source is lower than the predetermined level, setting the level of the second ready/busy pin to be the specific level with the power failure handling circuit to prevent the controller from sending a second write command to the flash memory.
The method as claimed in claim 12, wherein the power failure handling circuit comprises a power failure detecting circuit and a voltage setting circuit, and the method further comprises:
- detecting whether the level of the voltage source has been kept at the predetermined level with the power failure detecting circuit to generate a control signal;
- and
- when the control signal indicates that the level of the voltage source is lower than the predetermined level, the voltage of the second ready/busy pin is set to the specific level with the voltage setting circuit.
Dependencies are inferred from the claim text.