Reinforced fan-out wafer-level package

A microelectronic package, comprising:

• a microelectronic element including first and second major surfaces and a plurality of side surfaces extending between the major surfaces, the first major surface having contacts formed thereon;
• a redistribution layer including a dielectric layer having an inside surface, a portion of which extends along the first major surface of the microelectronic element, an outside surface with contact pads exposed thereon, and a plurality of conductive traces electrically connecting the pads to the microelectronic element;
• a reinforcing layer adhered to at least a portion of at least one of the side surfaces of the microelectronic element and extending along a portion of the inside surface of the dielectric layer from adjacent the microelectronic element and terminating at a location remote therefrom along the side wall such that at least the first major surface of the microelectronic element is uncovered by the reinforcing layer;
• and
• an encapsulation layer formed over at least the microelectronic element, and the reinforcing layer.

A microelectronic package, comprising:

• a microelectronic element including first and second rectangular major surfaces and four side surfaces extending between the major surfaces;
• a redistribution layer including an inside surface, a portion of which extends along the first major surface of the microelectronic element and defining a fan-out area extending away from the microelectronic element, the redistribution layer further including an outside surface with contact pads exposed thereon, and a plurality of conductive traces electrically connecting the pads to the microelectronic element;
• a reinforcing layer adhered to a portion of each of the side surfaces of the microelectronic element and extending along a portion of the inside surface of the redistribution layer, within the fan-out portion, from adjacent the microelectronic element to a location remote therefrom, the reinforcing layer not contacting the first major surface of the microelectronic element;
• and
• an encapsulation layer formed over at least the microelectronic element, and the reinforcing layer.

A method of making a microelectronic package, comprising:

• forming a reinforcing layer adhering to at least one edge surface of a microelectronic element, the microelectronic element having a first surface having contacts thereon, a second surface remote therefrom, and edge surfaces extending between the first and second surfaces, the reinforcing layer not extending along the first surface of the microelectronic element;
• and then
• forming an encapsulant overlying the second surface of the microelectronic element and contacting the reinforcing layer;
• and
• patterning conductive elements extending from the contacts along the first surface and along a surface of the reinforcing layer beyond the at least one edge surface.

A method for making a microelectronic package, comprising:

• forming a reinforcing structure on an in-process unit having a foil defining a first surface and laminated on a carrier layer and at least one microelectronic element mounted on the foil, the microelectronic element having a first major surface on the foil, a second major surface remote therefrom at a first height and a plurality of edge surfaces extending between the major surfaces, wherein the reinforcing structure is formed adhering to a portion of at least one of the edge surfaces from a location adjacent the foil to a location remote therefrom at a second height that is less than the first height and to extend along a portion of the foil surrounding the microelectronic element;
• forming an encapsulation layer over at least the reinforcing structure and a portion of the microelectronic element;
• removing the foil and carrier from the in-process unit to temporarily expose the first surface of the microelectronic element and a first surface of the reinforcing structure;
• and
• forming a redistribution layer along at least the first surface of the reinforcing structure and the microelectronic element, the redistribution layer including a dielectric material defining an inside surface contacting portions of the reinforcing structure and the microelectronic element and an outside surface having a plurality of contact pads exposed thereon, the redistribution layer further including a plurality of conductive traces electronically connecting the contact pads to the microelectronic element.