Apparatus and method for equalization

An apparatus for equalizing an input voltage, comprising:

• a first resistor having a first end and a second end, the first end configured to receive the input voltage;
• a second resistor having a first end electrically connected to the second end of the first resistor at an output node;
• an inverting voltage buffer for substantially inverting the input voltage to generate an inverted input voltage;
• a first capacitor;
• and
• a transconductance buffer for receiving the inverted input voltage and for generating a current from a first end of the first capacitor to the output node, the current equal to about the input voltage divided by the impedance of the first capacitor.

A method of equalizing an input voltage signal, the method comprising:

• providing a capacitor, the capacitor having a first end electrically connected to a first voltage reference;
• providing a first resistor, the first resistor including a first end for receiving the input voltage signal and a second end for providing an output voltage signal;
• providing a second resistor, the second resistor including a first end electrically connected to the second end of the first resistor and a second end electrically connected to a second voltage reference, wherein the first and second resistors are configured to attenuate a DC component of the input voltage signal;
• and
• generating a current to the second end of the first resistor, the current having the same polarity as the input voltage and having a magnitude proportional to the magnitude of the input voltage divided by the impedance of the capacitor.