US 2012/0268180 A1 · DELAY LOCKED LOOP

Abstract

A delay locked loop includes a delay unit delaying an input clock to generate an output clock, a replica delay unit delaying the output clock to generate a feedback clock, a phase comparing unit outputting a phase signal having a first or second value according to whether the phase of the feedback clock leads the phase of the input clock, a filtering unit generates a filtering signal in response to the phase signal and updates the filtering signal when a difference of count numbers of the phase signal having the first value and the second value is substantially equal to a filtering depth, a locking unit generates a locking signal in response to the filtering signal, and a control unit adjusts a delay value in response to the filtering signal and maintains the delay value when the locking signal is activated.

Claims20

Dependent claims

A delay locked loop comprising:

a delay unit configured to delay an input clock to generate an output clock;
a replica delay unit configured to delay the output clock to generate a feedback clock;
a phase comparing unit configured to output a phase signal having a first value when a phase of the feedback clock leads a phase of the input clock and having a second value when the phase of the feedback clock lags behind the phase of the input clock;
a filtering unit configured to generate a filtering signal in response to the phase signal and update the filtering signal when a difference between a count number of the phase signal having the first value and a count number of the phase signal having the second value is substantially equal to a filtering depth;
a locking unit configured to generate a locking signal in response to the filtering signal;
and
a control unit configured to adjust a delay value of the delay unit in response to the filtering signal and maintain the delay value of the delay unit when the locking signal is activated.

4 more elements

Dependencies are inferred from the claim text.

Delay locked loop

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Delay locked loop

Life of this patent

Abstract

Claims20