Implementing temporary disable function of protected circuitry by modulating threshold voltage of timing sensitive circuit

A design structure embodied in a machine readable medium used in a design process, the design structure comprising:

• a circuit tangibly embodied in the machine readable medium used in the design process, said circuit for implementing a temporary disable function of circuitry to be protected of a semiconductor chip, said circuit comprising:
• a hacking detect function providing a hacking detect signal;
• an independently voltage controlled isolated silicon region;
• a timing sensitive circuit disposed above said independently voltage controlled silicon region;
• a threshold voltage control function receiving said hacking detect signal and applying a charging signal to said independently voltage controlled silicon region for modulating device threshold voltages in said timing sensitive circuit and temporarily disabling said timing sensitive circuit, wherein the design structure, when read and used in the manufacture of a semiconductor chip produces a chip comprising said circuit.

A method for implementing a temporary disable function of circuitry to be protected of a semiconductor chip comprising:

• providing a hacking detect function for generating a hacking detect signal;
• providing an independently voltage controlled isolated silicon region;
• providing a timing sensitive circuit disposed above said independently voltage controlled silicon region;
• applying said hacking detect signal to a threshold voltage control function;
• and
• said threshold voltage control function applying a charging signal to said independently voltage controlled silicon region responsive to said hacking detect signal for modulating device threshold voltages in said timing sensitive circuit and temporarily disabling said timing sensitive circuit.