Package-on-package semiconductor device

A POP semiconductor device comprising:

• a bottom package including a first substrate, at least a first chip disposed on a first upper surface of the first substrate, a plurality of external terminals disposed on a first lower surface of the first substrate, wherein a plurality of ball pads are disposed at a plurality of peripheries of the first upper surface of the first substrate;
• a top package mounted on the bottom package, the top package including a second substrate, one or more second chips disposed on a second upper surface of the second substrate, and a plurality of solder balls, wherein the solder balls are disposed at a plurality of peripheries of a second lower surface of the second substrate;
• and
• an anisotropic conductive adhesive layer interposed between the bottom package and the top package, the anisotropic conductive adhesive layer having a central opening, wherein the anisotropic conductive adhesive layer contains a plurality of conductive particles;
• wherein the size of the central opening and the thickness of the anisotropic conductive adhesive layer are selected such that the anisotropic conductive adhesive layer adheres the peripheries of the first upper surface of the first substrate to the peripheries of the second lower surface of the second substrate and the solder balls are encapsulated inside, wherein some of the conductive particles are embedded in the solder balls to mechanically joint and electrically connect to the ball pads.