Nonvolatile semiconductor memory device and method of manufacturing the same

A nonvolatile semiconductor memory device comprising U-shaped memory strings arranged in a matrix shape substantially perpendicularly to a substrate, wherein

• each of the U-shaped memory strings includes memory cell rows respectively on two sheet-like semiconductor films, lower end sides of which are connected to each other to form a U-shaped semiconductor film,
• the memory cell row includes, in a height direction of the sheet-like semiconductor film, a plurality of memory cells each including a tunnel dielectric film, a floating gate electrode film, an inter-electrode dielectric film, and a control gate electrode film on a first principal plane of the sheet-like semiconductor film that is an opposite side of an arranging position of the other sheet-like semiconductor film of the two sheet-like semiconductor films,
• the control gate electrode film includes a common connecting section that connects the control gate electrode films of the memory cells at same height of the memory cell rows forming different U-shaped memory strings arranged in a first direction and extends in the first direction and an electrode forming section that is provided for each of the memory cells above or below the floating gate electrode film via the inter-electrode dielectric film to project from the common connecting section in a second direction orthogonal to the first direction,
• the floating gate electrode film has a shape extending in the second direction and is formed on the first principal plane of the sheet-like semiconductor film via the tunnel dielectric film, and
• the memory cell has structure in which the floating gate electrode film is held, via the inter-electrode dielectric film, between the electrode forming sections of the upper and lower control gate electrode films.

A method of manufacturing a nonvolatile semiconductor memory device comprising:

• forming a stacked film in which control gate electrode films and first sacrificial films are alternately stacked above a semiconductor substrate;
• collectively processing the stacked film to form a first trench, which extends in a first direction, at a predetermined interval in a second direction orthogonal to the first direction;
• recessing the first sacrificial films from the first trench by a predetermined amount and forming a first space between the control gate electrode films vertically adjacent to each other such that the first sacrificial films are arranged at a predetermined interval in the second direction;
• covering a surface forming the first space with an inter-electrode dielectric film;
• filling a floating gate electrode film in the first space covered with the inter-electrode dielectric film;
• forming a tunnel dielectric film to cover an inner surface of the first trench after filling the floating gate electrode film in the first space;
• forming a semiconductor film functioning as a channel in the first trench covered with the tunnel dielectric film;
• and
• collectively processing the semiconductor film, the tunnel dielectric film, the floating gate electrode film, the inter-electrode dielectric film, and the control gate electrode films and forming a second trench at a predetermined interval in the first direction such that the floating gate electrode is separated between memory cells adjacent to each other in the first direction in an area between the first sacrificial films adjacent to each other in the second direction.