US 2012/0267698 A1 · FLOATING-GATE NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MAKING

Abstract

The present invention provides a floating-gate non-volatile semiconductor memory device and a method of making the same. The floating-gate non-volatile semiconductor memory device comprises a semiconductor substrate, a source, a drain, a first insulator layer, a first polysilicon layer, a second insulator layer, a second polysilicon layer, a protective layer and sidewalls. The source and drain are disposed on the semiconductor substrate. The first insulator layer is disposed over a region of the semiconductor substrate other than regions corresponding to the source and drain. The first polysilicon layer is disposed over the first insulator layer, forming a floating gate. The second insulator layer is disposed over the first polysilicon layer. The second polysilicon layer is disposed over the second insulator layer, forming a control gate and a wordline. The sidewalls are disposed on two sides of the wordline, and the protective layer is disposed over the second polysilicon layer. A semiconductor junction at a drain region is a P-N junction, while a semiconductor junction at a source region is a metal-semiconductor junction.

Claims16

Dependent claims

A floating-gate non-volatile semiconductor memory device, comprising:

a semiconductor substrate;
a source and a drain on the semiconductor substrate;
a first insulator layer disposed over a region of the semiconductor substrate other than regions corresponding to the source and the drain;
a first polysilicon layer disposed over the first insulator layer, the polysilicon layer forming a floating gate;
a second insulator layer disposed over the first polysilicon layer;
a second polysilicon layer disposed over the second insulator layer, the second polysilicon layer forming a control gate and a wordline;
a protective layer disposed over the second polysilicon layer;
and
sidewalls disposed on two sides of the wordline;
wherein a semiconductor junction at the drain region is a P-N junction, and a semiconductor junction at the source region is a metal-semiconductor junction.

7 more elements

A method of making a floating-gate non-volatile semiconductor memory device, comprising:

providing a semiconductor substrate;
forming consecutively over the semiconductor substrate a first insulator layer, a first polysilicon layer, a second insulator layer, and a second polysilicon layer;
depositing a protective layer directly over the second polysilicon layer;
forming a hard mask layer over the protective layer;
etching consecutively the hard mask layer, the protective layer, the second polysilicon layer, the second insulator layer, the first polysilicon layer, the first insulator layer, thereby forming openings corresponding, respectively, to a drain and a source, the openings exposing the semiconductor substrate;
depositing a first dielectric layer, and etching the first dielectric layer while retaining part of the first dielectric layer filling the opening corresponding to the source;
implanting ions at the positions of the openings, thereby forming the P-N junction at a drain region;
removing the first dielectric layer;
forming sidewalls covering sides of the openings corresponding to the drain and the source, respectively;
and
depositing a metal layer to form a metal-semiconductor junction at a source region.

8 more elements

Dependencies are inferred from the claim text.

Floating-gate nonvolatile semiconductor memory device and method of making

Life of this patent

Floating-gate nonvolatile semiconductor memory device and method of making

Life of this patent

Abstract

Claims16