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US 2012/0260103 A1Published application
Security circuit using at least two finite state machine units and methods using the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKyung-Wan NAM, Jae-Chul PARK
Life of this patent
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Abstract
A security circuit using at least two finite state machine units for storing data to and reading data from a multiport memory in a pipelined manner and an intermediate memory, for facilitating transfer of data between the at least two finite state machines. The security circuit may be used to perform key setup and/or data ciphering faster. The security circuit may operate in any environment where the key is changed every frame, for example, a wireless LAN application and the security circuit may operate in conjunction with, or as part of, a MAC controller.
Claims2
-30. (canceled)
A security circuit, comprising:
- a read finite state machine unit configured to read the data from the multiport memory in the pipelined manner and output the data to the intermediate memory;
- a write finite state machine unit configured to receive the data from the intermediate memory and write the data to the multiport memory in the pipelined manner;
- and
- an intermediate memory configured to facilitate transfer of data between the read finite state and the write finite state machine unit.
1 more element
Dependencies are inferred from the claim text.